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Thanks - that is a good list of easy-to-make mistakes.

This is not quite "won't work" but seems to be "user code runs fine, but debug fails", and that appears to be because the ...

Trying to bring up a new 18F97J94 project. Wrote trivial code and tried to run it under debug. I get a box pop up called "Verification Results" which tells me that addresses 200040 to 20027C ...

Two unrelated projects A and B in different folders
Work on project A, edit, compile, all as normal.
Close project A and open project B. Edit one of the tabbed files and save it.
Where does it get ...

Stupid question: When have the CCS TCPIP examples provided for download the last time?
According to the download manager, the latest is dated 8mar2012. I think you have to be on maintenance to get up ...

Can you give us the date stamp on the working files in your TCP/IP?
tcp.c, dns.c and stacktsk.c are all 2011, the rest are 2010 or older (mac.c and slip.c are 2006 for example)

Here we are (the 20 ...

Which TCP library version are you referring to?
The CCS one - C:\Program Files\PICC\TCP-IP\PIC Examples Source\tcpip

Resolved. I copied all the very latest TCP library files and the latest device file, not that any seemed to have any relevant changes (I diff'd the lot of them), and now the window figure is rational.

I'm seeing a curious error where the TCP window size seems to be wrongly reported by the PIC to the wire.

The trigger for the problem was user reports that comms just lock up with a Windows 7 host, ...

I also see there is a Mchip silicon errata item which explains that, even though it's not used, you have to set the INTOSC prescaler selector to 4MHz or 8MHz.

Now, for me, OSCCON 1:0, is set to 00, and the fuses have FOSC 2:1 set to 10

FOSC should be 01 (so that the 96M prescaler sees internal rather than external). That's what the hex file loads.

...

Then step into the device editor, and look at what CCS setting sets these bits. This is the little window in the top right of device editor, which shows CCS fuse 'names', and what registers/bits are m ...

PLL runs at 96MHz, its output is divided by two to provide the 48MHz (max) processor clock.

p35 of data sheet: "The PIC18F47J13 provides two PLL circuits: a 4x multiplier PLL and a 96 MHz PLL ...

Looks to me like two compiler bugs; the first is that the compiler doesn't "understand" the 96MHz PLL, and the second is that when using the ICD U-64, the config words get mangled - as well ...

> try this LED blinking program and see if it works:

works fine, except the actual delay period measures 1500ms, not 500. But at least the compiler doesn't barf. Working on it, and will report. ...

The 47J13 has a very competent (i.e. complex) clock configuration, and I want to use the internal oscillator at 8MHz to drive the 96MHz PLL. It is far from clear what the "magic spells" are. ...